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description the M37733M4LXXXHP is a single-chip microcomputer using the 7700 family core. this single-chip microcomputer has a cpu and a bus interface unit. the cpu is a 16-bit parallel processor that can be an 8-bit parallel processor, and the bus interface unit enhances the memory access efficiency to execute instructions fast. this microcomputer also includes a 32 khz oscillation circuit, in addition to the rom, ram, multiple-function timers, serial i/o, a-d converter, and so on. its strong points are the low power dissipation, the low supply voltage, and the small package. features l number of basic instructions .................................................. 103 l memory size rom ................................................. 32 kbytes ram ................................................ 2048 bytes l instruction execution time the fastest instruction at 12 mhz frequency ...................... 333 ns l single power supply ...................................................... 2.7C5.5 v l low power dissipation (at 3 v supply voltage, 12 mhz frequency) ............................................ 9 mw (typ.) l interrupts ............................................................ 19 types, 7 levels l multiple-function 16-bit timer ................................................. 5 + 3 l serial i/o (uart or clock synchronous) ..................................... 3 l 10-bit a-d converter .............................................. 8-channel inputs l 12-bit watchdog timer l programmable input/output (ports p0, p1, p2, p3, p4, p5, p6, p7, p8) ............................... 68 l clock generating circuit ........................................ 2 circuits built-in l small package ..................... 80-pin plastic molded fine-pitch qfp (80p6d-a;0.5 mm lead pitch) application control devices for general commercial equipment such as office automation, office equipment, personal information equipment, and so on. control devices for general industrial equipment such as communication equipment, and so on. single-chip 16-bit cmos microcomputer M37733M4LXXXHP mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. pin configuration (top view) outline 80p6d-a p3 0 /r/w p3 2 /ale p3 1 /bhe p3 3 /hlda x out e cnv ss reset p4 0 /hold 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 p8 6 /r x d 1 p8 7 /t x d 1 p0 0 /a 0 p0 1 /a 1 p0 2 /a 2 p0 3 /a 3 p0 4 /a 4 p0 5 /a 5 p0 6 /a 6 p0 7 /a 7 p1 0 /a 8 /d 8 p1 1 /a 9 /d 9 p1 2 /a 10 /d 10 p1 3 /a 11 /d 11 p1 4 /a 12 /d 12 p1 5 /a 13 /d 13 p1 6 /a 14 /d 14 p1 7 /a 15 /d 15 p2 0 /a 16 /d 0 p2 1 /a 17 /d 1 60 59 58 75 74 73 72 71 69 68 67 66 65 70 80 79 78 77 76 64 63 62 61 30 26 27 28 29 31 32 33 34 35 36 21 23 22 24 25 37 38 39 40 p4 1 /rdy p4 2 / f 1 byte x in v ss p2 7 /a 23 /d 7 p2 6 /a 22 /d 6 p2 5 /a 21 /d 5 p2 4 /a 20 /d 4 p2 3 /a 19 /d 3 p2 2 /a 18 /d 2 p6 6 /tb1 in p6 5 /tb0 in p6 4 /int 2 p6 3 /int 1 p6 2 /int 0 p6 1 /ta4 in p6 0 /ta4 out p5 7 /ta3 in /ki 3 p5 6 /ta3 out /ki 2 p5 5 /ta2 in /ki 1 p5 4 /ta2 out /ki 0 p5 3 /ta1 in p5 2 /ta1 out p5 1 /ta0 in p5 0 /ta0 out p4 7 p8 5 /clk 1 p8 4 /cts 1 /rts 1 p8 3 /t x d 0 p8 2 /r x d 0 /clks 0 p8 1 /clk 0 p8 0 /cts 0 /rts 0 /clks 1 v cc av cc v ref av ss v ss p7 6 /an 6 /x cout p7 5 /an 5 /ad trg /t x d 2 p7 4 /an 4 /r x d 2 p7 3 /an 3 /clk 2 p7 2 /an 2 /cts 2 p7 1 /an 1 p7 0 /an 0 p6 7 /tb2 in / f sub M37733M4LXXXHP p4 3 p4 4 p4 5 p4 6 p7 7 /an 7 /x cin 1 2 3 4 5
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 2 preliminary notice: this is not a final specification. some paramentic limits are suject to change. M37733M4LXXXHP block diagram x in x out e reset reset input v ref p8(8) p7(8) p5(8) p6(8) p4(8) p3(4) p2(8) p1(8) cnvss byte p0(8) uart1(9) uart0(9) av ss (0v) av cc (0v) v ss v cc a-d converter(10) x cin x cout x cin x cout clock input clock output enable output reference voltage input external data bus width selection input clock generating circuit instruction register(8) arithmetic logic unit(16) accumulator a(16) accumulator b(16) index register x(16) index register y(16) stack pointer s(16) direct page register dpr(16) processor status register ps(11) input butter register ib(16) data bank register dt(8) program bank register pg(8) program counter pc(16) incrementer/decrementer(24) data address register da(24) program address register pa(24) incrementer(24) instruction queue buffer q 2 (8) instruction queue buffer q 1 (8) instruction queue buffer q 0 (8) data buffer db l (8) data buffer db h (8) rom 32 kbytes ram 2048 bytes timer ta3(16) timer ta4(16) timer ta2(16) timer ta1(16) timer ta0(16) watchdog timer timer tb2(16) timer tb1(16) timer tb0(16) address bus data bus(odd) data bus(even) input/output port p8 input/output port p7 input/output port p6 input/output port p5 input/output port p4 input/output port p3 input/output port p2 input/output port p1 input/output port p0 uart2(9)
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 3 functions of M37733M4LXXXHP memory size input/output ports multi-function timers interrupts clock generating circuit power dissipation parameter functions number of basic instructions 103 instruction execution time 333 ns (the fastest instruction at external clock 12 mhz frequency) rom 32 kbytes ram 2048 bytes p0 C p2, p4 C p8 8-bit 5 8 p3 4-bit 5 1 ta0, ta1, ta2, ta3, ta4 16-bit 5 5 tb0, tb1, tb2 16-bit 5 3 serial i/o (uart or clock synchronous serial i/o) 5 3 a-d converter 10-bit 5 1 (8 channels) watchdog timer 12-bit 5 1 3 external types, 16 internal types each interrupt can be set to the priority level (0 C 7.) 2 circuits built-in (externally connected to a ceramic resonator or a quartz-crystal oscillator) supply voltage 2.7 C 5.5 v 9 mw (at 3 v supply voltage, external clock 12 mhz frequency) 22.5 mw (at 5 v supply voltage, external clock 12 mhz frequency) input/output voltage 5 v output current 5 ma memory expansion maximum 16 mbytes operating temperature range C40 to 85 c device structure cmos high-performance silicon gate process package 80-pin plastic molded fine-pitch qfp (80p6d-a;0.5 mm lead pitch) input/output characteristic
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 4 preliminary notice: this is not a final specification. some paramentic limits are suject to change. x in clock input input x out clock output output pin name input/output functions vcc, power source apply 2.7 C 5.5 v to vcc and 0 v to vss. vss cnvss cnvss input input this pin controls the processor mode. connit to vss for the single-chip mode and the memory expansion mode, and to vcc for the microprocessor mode. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ reset reset input input when l level is applied to this pin, the microcomputer enters the reset state. these are pins of main-clock genirating circuit. connict a ceramic resonator or a quartz- crystal oscillator between x in and x out . when an external clock is used, the clock source should be connected to the x in pin, and the x out pin should be left open. _ _ _ _ _ _ e enable output output this pin functions as the enable signal output pin which indicates the access status in the internal _ _ _ bus. when output level of e signal is l, data/instruction read or data write is performed. byte external data input in the memory expansion mode or the microprocessor mode, this pin determinis whether the bus width external data bus has an 8-bit width or a 16-bit width. the data bus has a 16-bit width when l selection input signal is input and an 8-bit width when h signal is input. avcc, analog power power source input pin for the a-d converter. externally connict avcc to vcc and avss to vss. avss source input v ref reference input this is reference voltage input pin for the a-d converter. voltage input p0 0 C p0 7 i/o port p0 i/o in the single-chip mode, port p0 becomes an 8-bit i/o port. an i/o direction register is available so that each pin can be programmed for input or output. these ports are in the input mode when reset. in the memory expansion mode or the microprocessor mode, these pins output address (a 0 C a 7 ). p1 0 C p1 7 i/o port p1 i/o in the single-chip mode, these pins have the same functions as port p0. when the byte pin is set to l in the memory expansion mode or the microprocessor mode and external data bus has a 16-bit width, high-order data (d 8 C d 15 ) is input/output or an address (a 8 C a 15 ) is output. when the byte pin is h and an external data bus has an 8-bit width, only address (a 8 C a 15 ) is output. p2 0 C p2 7 i/o port p2 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion mode or the microprocessor mode, low-order data (d 0 C d 7 ) is input/output or an address (a 16 C a 23 ) is output. p3 0 C p3 3 i/o port p3 i/o in the single-chip mode, these pins have the same function as port p0. in the memory expansion _ _ _ _ __ _ _ _ _ _ _ ______ mode or the microprocessor mode, r/w , bhe , ale, and hlda signals are output. p4 0 C p4 7 i/o port p4 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion _ _ _ _ _ _ _ __ _ _ _ _ _ _ mode or the microprocessor mode, p4 0 , p4 1 , and p4 2 become hold and rdy input pins, and clock f 1 output pin, respectively. functions of the other pins are the same as in the single-chip mode. however, in the memory expansion mode, p4 2 also functions as an i/o port. p5 0 C p5 7 i/o port p5 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ function as i/o pins for timers a0 to a3 and input pins for key input interrupt input ( ki 0 C ki 3 ). p6 0 C p6 7 i/o port p6 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ function as i/o pins for timer a4, input pins for external interrupt input ( int 0 C int 2 ) and input pins for timers b0 to b2. p6 7 also functions as sub-clock f sub output pin. p7 0 C p7 7 i/o port p7 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins function as input pins for a-d converter. p7 2 to p7 5 also function as i/o pins for uart2. additionally, p7 6 and p7 7 have the function as the output pin (x cout ) and the input pin (x cin ) of the sub-clock (32 khz) oscillation circuit, respectively. when p7 6 and p7 7 are used as the x cout and x cin pins, connect a resonator or an oscillator between the both. p8 0 C p8 7 i/o port p8 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also function as i/o pins for uart 0 and uart 1. pin description
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 5 a-d/uart2 trans./rece. timer b2 timer b1 timer b0 timer a4 timer a3 timer a2 timer a1 timer a0 int 2 /key input int 0 watchdog timer dbc brk instruction zero divide reset internal peripheral devices control registers refer to fig. 2 for detail information interrupt vector table 000000 16 00ffff 16 010000 16 01ffff 16 bank 0 16 bank 1 16 fe0000 16 feffff 16 ff0000 16 ffffff 16 bank ff 16 bank fe 16 00ffff 16 008000 16 000000 16 00007f 16 000080 16 internal ram 2048 bytes internal rom 32 kbytes 00fffe 16 00ffd6 16 00007f 16 000000 16 uart1 transmission uart1 receive uart0 transmission uart0 receive ??????????????????? int 1 note. internal rom area can be modified. (refer to the section on rom area modification function.) 00ffd6 16 00087f 16 basic function blocks the M37733M4LXXXHP has the same functions as the m37733mhbxxxfp except for the memory allocation, the reset circuit, the rom area modification function, and the package. refer to the section on the m37733mhbxxxfp. memory the memory map is shown in figure 1. the address space has a capacity of 16 mbytes and is allocated to addresses from 0 16 to ffffff 16 . the address space is divided by 64-kbyte unit called bank. the banks are numbered from 0 16 to ff 16 . built-in rom, ram and control registers for internal peripheral devices are assigned to bank 0 16 . the 32-kbyte area from addresses 8000 16 to ffff 16 is the built-in rom. addresses ffd6 16 to ffff 16 are the reset and interrupt vector addresses and contain the interrupt vectors. refer to the section on interrupts for details. the 2048-byte area allocated to addresses from 80 16 to 87f 16 is the built-in ram. in addition to storing data, the ram is used as stack during a subroutine call or interrupts. peripheral devices such as i/o ports, a-d converter, serial i/o, timer, and interrupt control registers are allocated to addresses from 0 16 to 7f 16 . additionally, the internal rom area can be modified by software. refer to the section on rom area modification function for details. a 256-byte direct page area can be allocated anywhere in bank 0 16 by using the direct page register (dpr). in the direct page addressing mode, the memory in the direct page area can be accessed with two words. hence program steps can be reduced. fig. 1 memory map
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 6 preliminary notice: this is not a final specification. some paramentic limits are suject to change. fig. 2 location of internal peripheral devices and interrupt control registers 00002a uart 0 transmission interrupt control register uart 1 transmission interrupt control register int 2 /key input interrupt control register port p1 direction register uart 0 transmit/receive mode register uart 0 baud rate register uart 0 transmit/receive control register 0 uart 0 transmit/receive control register 1 uart 0 transmission buffer register uart 1 transmit/receive control register 0 uart 1 transmit/receive mode register uart 1 baud rate register uart 1 transmit/receive control register 1 uart 0 receive buffer register uart 1 transmission buffer register uart 1 receive buffer register port p0 register a-d register 0 a-d register 2 port p1 register port p0 direction register port p2 register port p3 register port p4 register port p5 register port p6 register port p7 register port p8 register a-d control register 0 a-d control register 1 a-d register 1 a-d register 3 a-d register 4 a-d register 5 000000 000001 000002 000003 000005 000006 000007 000008 000009 000010 000011 000012 000013 000014 000015 000016 000017 000018 000019 00001a 00001b 00001c 00001d 00001e 00001f 000020 000021 000022 000023 000024 000025 000026 000027 000028 000029 00002b 00002c 00002d 00002e 00002f 000030 000031 000032 000033 000034 000035 000036 000037 000038 000039 00003a 00003b 00003c 00003d 00003e 00003f 00000b 00000c 00000d 00000e 00000f 00000a 000004 000040 000041 000042 000043 000045 000046 000047 000048 000049 000050 000051 000052 000053 000054 000055 000056 000057 000058 000059 00005a 00005b 00005c 00005d 00005e 00005f 000060 000061 000062 000063 000064 000065 000066 000067 000068 000069 00006a 00006b 00006c 00006d 00006e 00006f 000070 000071 000072 000073 000074 000075 000076 000077 000078 000079 00007a 00007b 00007c 00007d 00007e 00007f 00004b 00004c 00004d 00004e 00004f 00004a 000044 address (hexadecimal notation) address (hexadecimal notation) timer a1 register timer a4 register timer a2 register timer a3 register timer b0 register timer b1 register timer b2 register count start flag one-shot start flag up-down flag timer a0 register timer a0 mode register timer a1 mode register timer a2 mode register timer a4 mode register timer b0 mode register timer b1 mode register timer b2 mode register processor mode register 0 watchdog timer register watchdog timer frequency selection flag a-d/uart 2 trans./rece. interrupt control register uart 0 receive interrupt control register uart 1 receive interrupt control register timer a0 interrupt control register timer a1 interrupt control register timer a2 interrupt control register timer a3 interrupt control register timer a4 interrupt control register timer b0 interrupt control register timer b1 interrupt control register timer b2 interrupt control register int 0 interrupt control register int 1 interrupt control register processor mode register 1 oscillation circuit control register 1 serial transmit control register port function control register oscillation circuit control register 0 timer a3 mode register port p2 direction register port p3 direction register port p4 direction register port p5 direction register port p6 direction register port p7 direction register port p8 direction register reserved area (note) reserved area (note) a-d register 6 a-d register 7 uart 2 transmit/receive control register 1 uart 2 transmit/receive control register 0 uart 2 transmission buffer register uart 2 baud rate register uart 2 transmit/receive mode register memory allocation control register reserved area (note) uart 2 receive buffer register note. do not write to this address.
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 7 v cc reset reset v cc 0v 0v 2.7v 0.55v power on note. in this case, stabilized clock is input from the external to the main-clock oscillation circuit. perform careful evalvation at the system design level before using. reset circuit _ _ _ _ _ _ _ _ _ _ _ _ _ the microcomputer is released from the reset state when the reset pin is returned to h level after holding it at l level with the power source voltage at 2.7 C 5.5 v. program execution starts at the address formed by setting address a 23 C a 16 to 00 16 , a 15 C a 8 to the contents of address ffff 16 , and a 7 C a 0 to the contents of address fffe 16 . figure 3 shows an example of a reset circuit. when the stabilized clock is input from the external to the main-clock oscillation circuit, the reset input voltage must be 0.55 v or less when the power source voltage reaches 2.7 v. when a resonator/oscillator is connected to the main-clock oscillation circuit, change the reset input voltage from l to h after the main-clock oscillation is fully stabilized. the status of the internal registers during reset is the same as the m37733mhbxxxfps. fig. 3 example of a reset circuit
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 8 preliminary notice: this is not a final specification. some paramentic limits are suject to change. rom area modification function the internal rom size and its address area of the M37733M4LXXXHP can be modified by the memory allocation control registers bit 0 shown in figure 4. figure 6 shows the memory allocation in which the internal rom size and its address area are modified. make sure to write data in the memory allocation control register as the flow shown in figure 5. this rom area modification function is valid in memory expansion mode and single-chip mode. when ordering a mask rom, mitsubishi electric corp. produces the mask rom using the data within 32 kbytes (addresses 008000 16 C 00ffff 16 ). it is regardless of the selected rom size (refer to mask rom order confirmation form.) therefore, program ff 16 to the addresses out of the selected rom area in the eprom which you tender when ordering a mask rom. address 00ffff 16 of this microcomputer corresponds to the lowest address of the eprom which you tender. 76543210 ml 0 memory allocation control register memory allocation selection bit rom size (rom area) 0 : 32 kbytes (addresses 008000 16 ?00ffff 16 ) 1 : 16 kbytes (addresses 00c000 16 ?00ffff 16 ) address 63 16 note. write to the memory allocation control register as the flow shown in figure 5. fig. 4 bit configuration of memory allocation control register fig. 5 how to write data in memory allocation control register writing data ?5 16 ?(ldm instruction) writing data ?0 16 ?or ?1 16 ?(ldm instruction) ml 0 selection bit next instruction ?how to write in memory allocation control register
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 9 sfr internal rom 32 kbytes : external memory area 000000 16 00007f 16 000080 16 00087f 16 008000 16 00ffff 16 010000 16 ffffff 16 internal ram 2048 bytes sfr (ml 0 ) = (0) (ml 0 ) = (1) rom size : 32 kbytes rom size : 16 kbytes internal rom 16 kbytes 000000 16 00007f 16 000080 16 00087f 16 00c000 16 00ffff 16 010000 16 ffffff 16 internal ram 2048 bytes fig. 6 memory allocation (modification of internal rom area by memory allocation selection bit) addressing modes the M37733M4LXXXHP has 28 powerful addressing modes. refer to the single-chip 16-bit microcomputers data book for the details of each addressing mode. machine instruction list the M37733M4LXXXHP has 103 machine instructions. refer to the single-chip 16-bit microcomputers data book for details. data required for mask rom ordering please send the following data for mask orders. (1) M37733M4LXXXHP mask rom order confirmation form (2) 80p6d mark specification form (3) rom data (eprom 3 sets)
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 10 preliminary notice: this is not a final specification. some paramentic limits are suject to change. absolute maximum ratings symbol parameter conditions ratings unit vcc power source voltage C0.3 to +7 v avcc analog power source voltage C0.3 to +7 v v i _ _ _ _ _ _ _ _ _ _ _ _ _ input voltage reset , cnvss, byte C0.3 to +12 v input voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3, p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , v ref , x in output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3, p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7, _ _ _ x out , e p d power dissipation ta = 25 c 200 mw t opr operating temperature C40 to +85 c t stg storage temperature C65 to +150 c v i v o C0.3 to vcc + 0.3 v C0.3 to vcc + 0.3 v limits min. typ. max. f(x in ) : operating 2.7 5.5 f(x in ) : stopped, f(x cin ) = 32.768 khz 2.7 5.5 avcc analog power source voltage vcc v vss power source voltage 0v avss analog power source voltage 0 v high-level input voltage p0 0 C p0 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , _ _ _ _ _ _ _ _ _ _ _ _ p7 0 C p7 7 , p8 0 C p8 7 , x in , reset , cnvss, byte, x cin (note 3) high-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in single-chip mode) high-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in memory expansion mode and microprocessor mode) low-level input voltage p0 0 C p0 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , _ _ _ _ _ _ _ _ _ _ _ _ _ p7 0 C p7 7 , p8 0 C p8 7 , x in , reset , cnvss, byte, x cin (note 3) low-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in single-chip mode) low-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in memory expansion mode and microprocessor mode) high-level peak output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 high-level average output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 low-level peak output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 3 , p5 4 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 low-level peak output current p4 4 C p4 7 , p5 0 C p5 3 low-level average output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 3 , p5 4 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 i ol(avg) low-level average output current p4 4 C p4 7 , p5 0 C p5 3 12 ma f(x in ) main-clock oscillation frequency (note 4) 12 mhz f(x cin) sub-clock oscillation frequency 32.768 50 khz unit symbol parameter recommended operating conditions (vcc = 2.7 C 5.5 v, ta = C40 to +85 c, unless otherwise noted) v vcc power source voltage notes 1. average output current is the average value of a 100 ms interval. 2. the sum of i ol(peak) for ports p0, p1, p2, p3, and p8 must be 80 ma or less, the sum of i oh(peak) for ports p0, p1, p2, p3, and p8 must be 80 ma or less, the sum of i ol(peak) for ports p4, p5, p6, and p7 must be 100 ma or less, and the sum of i oh(peak) for ports p4, p5, p6, and p7 must be 80 ma or less. 3. limits v ih and v il for x cin are applied when the sub clock external input selection bit = 1. 4. the maximum value of f(x in ) = 6 mhz when the main clock division selection bit = 1. 0.8 vcc 0.8 vcc 0.5 vcc 0 0 0 vcc vcc vcc 0.2vcc 0.2vcc 0.16vcc C10 C5 10 16 5 v v v v v v ma ma ma ma ma v ih v ih v ih v il v il v il i oh(peak) i oh(avg) i ol(peak) i ol(peak) i ol(avg)
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 11 unit electrical characteristics (vcc = 5 v, vss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted) symbol parameter test conditions 3 2.5 4.7 v v oh v oh C0.5 C0.18 high-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 high-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 high-level output voltage p3 0 C p3 2 _ _ _ high-level output voltage e low-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 , p4 0 C p4 3 , p5 4 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 low-level output voltage p4 4 C p4 7 , p5 0 C p5 3 low-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 low-level output voltage p3 0 C p3 2 _ _ _ low-level output voltage e _ _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ hysteresis hold , rdy , ta0 in C ta4 in , tb0 in C tb2 in , _ _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ __ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ __ _ _ _ _ _ _ __ _ _ _ _ _ _ _ _ _ int 0 C int 2 , ad trg , cts 0 , cts 1 , cts 2 , clk 0 , _ _ _ _ _ _ _ _ _ _ __ _ _ _ _ _ _ _ clk 1 , clk 2 , ki 0 C ki 3 _ _ _ _ _ _ _ _ _ hysteresis reset hysteresis x in hysteresis x cin (when external clock is input) high-level input current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , _ _ _ _ _ _ _ _ _ p8 0 C p8 7 , x in , reset , cnvss, byte low-level input current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 3 , p6 0 , p6 1 , p6 5 C p6 7 , ________ p7 0 C p7 7 , p8 0 C p8 7 , x in , reset , cnvss, byte v oh 3.1 4.8 2.6 3.4 4.8 2.6 v oh v ol v v v v 2 0.5 1.8 1.5 v v ol 0.45 1.9 0.43 0.4 1.6 0.4 0.4 v v v 0.4 0.1 0.2 0.1 0.1 0.06 0.1 0.06 v cc = 5 v, i oh = C10 ma v cc = 3 v, i oh = C1 ma v cc = 5 v, i oh = C400 m a v cc = 5 v, i oh = C10 ma v cc = 5 v, i oh = C400 m a v cc = 3 v, i oh = C1 ma v cc = 5 v, i oh = C10 ma v cc = 5 v, i oh = C400 m a v cc = 3 v, i oh = C1 ma v cc = 5 v, i ol = 10 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 16 ma v cc = 3 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v, v i = 5 v v cc = 3 v, v i = 3 v v cc = 5 v, v i = 0 v v cc = 3 v, v i = 0 v v i = 0 v, without a pull-up transistor v i = 0 v, with a pull-up transistor when clock is stopped. 1 0.7 0.5 0.4 0.4 0.26 0.4 0.26 v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v C0.25 C0.08 2 5 4 C5 C4 C5 C4 C1.0 C0.35 v v v v m a m a m a ma v v ol v ol v ol v t+ C v tC v t+ C v tC v t+ C v tC v t+ C v tC i ih i il i il v ram low-level input current p5 4 C p5 7 , p6 2 C p6 4 ram hold voltage limits min. typ. max.
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 12 preliminary notice: this is not a final specification. some paramentic limits are suject to change. v cc = 5 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 0.75 mhz), f(x cin ) : stopped, in operating v cc = 3 v, f(x in ) = 12 mhz (square waveform), f(x cin ) = 32.768 khz, when a wit instruction is executed (note 2) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, in operating (note 3) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, when a wit instruction is executed (note 4) ta = 25 c, when clock is stopped ta = 85 c, when clock is stopped ma ma ma m a m a m a m a m a max. 9 6 0.8 12 60 6 1 20 limits typ. 4.5 3 0.4 6 30 3 unit min. test conditions symbol parameter electrical characteristics (vcc = 5 v, vss = 0 v, ta = C40 to +85 c, unless otherwise noted) when single-chip mode, output pins are open, and other pins are v ss . power source current i cc notes 1. this applies when the main clock external input selection bit = 1, the main clock division selection bit = 0, and the signal output stop bit = 1. 2. this applies when the main clock external input selection bit = 1 and the system clock stop bit at wait state = 1. 3. this applies when cpu and the clock timer are operating with the sub clock (32.768 khz) selected as the system clock. 4. this applies when the x cout drivability selection bit = 0 and the system clock stop bit at wait state = 1. limits min. typ. max. resolution v ref = v cc 10 bits absolute accuracy v ref = v cc 3 lsb r ladder ladder resistance v ref = v cc 10 25 k w t conv conversion time 19.6 s v ref reference voltage 2.7 v cc v v ia analog input voltage 0 v ref v symbol parameter test conditions unit aCd converter characteristics (v cc = av cc = 5 v, v ss = av ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note)) note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. m
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 13 limits min. max. t c external clock input cycle time (note 1) 83 ns t w(h) external clock input high-level pulse width (note 2) 33 ns t w(l) external clock input low-level pulse width (note 2) 33 ns t r external clock rise time 15 ns t f external clock fall time 15 ns timing requirements (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note 1)) notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mh z . 2. input signals rise/fall time must be 100 ns or less, unless otherwise noted. unit symbol parameter notes 1. when the main clock division selection bit = 1, the minimum value of t c = 166 ns. 2. when the main clock division selection bit = 1, values of t w(h) / t c and t w(l) / t c must be set to values from 0.45 through 0.55. external clock input single-chip mode unit symbol parameter limits min. max. t su(p0dCe) port p0 input setup time 200 ns t su(p1dCe) port p1 input setup time 200 ns t su(p2dCe) port p2 input setup time 200 ns t su(p3dCe) port p3 input setup time 200 ns t su(p4dCe) port p4 input setup time 200 ns t su(p5dCe) port p5 input setup time 200 ns t su(p6dCe) port p6 input setup time 200 ns t su(p7dCe) port p7 input setup time 200 ns t su(p8dCe) port p8 input setup time 200 ns t h(eCp0d) port p0 input hold time 0ns t h(eCp1d) port p1 input hold time 0ns t h(eCp2d) port p2 input hold time 0ns t h(eCp3d) port p3 input hold time 0ns t h(eCp4d) port p4 input hold time 0ns t h(eCp5d) port p5 input hold time 0ns t h(eCp6d) port p6 input hold time 0ns t h(eCp7d) port p7 input hold time 0ns t h(eCp8d) port p8 input hold time 0ns memory expansion mode and microprocessor mode limits min. max. t su(dCe) data input setup time 80 ns t su(rdyC f 1) _ _ _ _ _ _ _ _ rdy input setup time 80 ns t su(holdC f 1) _ _ _ _ _ _ _ _ _ hold input setup time 80 ns t h(eCd) data input hold time 0ns t h( f 1Crdy) _ _ _ _ _ _ _ _ _ rdy input hold time 0ns t h( f 1Chold) _ _ _ _ _ _ _ _ _ _ hold input hold time 0ns unit symbol parameter
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 14 preliminary notice: this is not a final specification. some paramentic limits are suject to change. limits min. max. t c(ta) tai in input cycle time 250 ns t w(tah) tai in input high-level pulse width 125 ns t w(tal) tai in input low-level pulse width 125 ns unit symbol parameter timer a input (count input in event counter mode) limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width (note) 333 ns t w(tal) tai in input low-level pulse width (note) 333 ns unit symbol parameter timer a input (gating input in timer mode) timer a input (external trigger input in one-shot pulse mode) note. limits change depending on f(x in ). refer to data formulas. note. limits change depending on f(x in ). refer to data formulas. limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter limits min. max. t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter timer a input (external trigger input in pulse width modulation mode) timer a input (up-down input in event counter mode) limits min. max. t c(up) tai out input cycle time 3333 ns t w(uph) tai out input high-level pulse width 1666 ns t w(upl) tai out input low-level pulse width 1666 ns t su(upCt in ) tai out input setup time 666 ns t h(t in Cup) tai out input hold time 666 ns unit symbol parameter timer a input (two-phase pulse input in event counter mode) limits min. max. t c(ta) taj in input cycle time 2000 ns t su(taj in Ctaj out ) taj in input setup time 500 ns t su(taj out Ctaj in ) taj out input setup time 500 ns unit symbol parameter
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 15 limits min. max. t c(tb) tbi in input cycle time (one edge count) 250 ns t w(tbh) tbi in input high-level pulse width (one edge count) 125 ns t w(tbl) tbi in input low-level pulse width (one edge count) 125 ns t c(tb) tbi in input cycle time (both edges count) 500 ns t w(tbh) tbi in input high-level pulse width (both edges count) 250 ns t w(tbl) tbi in input low-level pulse width (both edges count) 250 ns unit symbol parameter timer b input (count input in event counter mode) timer b input (pulse period measurement mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter note. limits change depending on f(x in ). refer to data formulas. timer b input (pulse width measurement mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter note. limits change depending on f(x in ). refer to data formulas. a-d trigger input unit symbol parameter limits min. max. t c(ad) _ _ _ _ _ _ _ _ _ _ ad trg input cycle time (minimum allowable trigger) 1333 ns t w(adl) _ _ _ _ _ _ _ _ ad trg input low-level pulse width 166 ns serial i/o limits min. max. t c(ck) clk i input cycle time 333 ns t w(ckh) clk i input high-level pulse width 166 ns t w(ckl) clk i input low-level pulse width 166 ns t d(cCq) t x d i output delay time 100 ns t h(cCq) t x d i hold time 0ns t su(dCc) r x d i input setup time 65 ns t h(cCd) r x d i input hold time 75 ns unit symbol parameter ____ ___ external interrupt int i input, key input interrupt ki i input unit symbol parameter limits min. max. t w(inh) _ _ _ _ _ _ int i input high-level pulse width 250 ns t w(inl) _ _ _ _ _ int i input low-level pulse width 250 ns t w(kil) _ _ _ _ _ _ _ ki i input low-level pulse width 250 ns
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 16 preliminary notice: this is not a final specification. some paramentic limits are suject to change. data formulas timer a input (gating input in timer mode) 8 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) limits min. max. symbol parameter unit t c(ta) tai in input cycle time t w(tah) tai in input high-level pulse width t w ( tal ) tai in input low-level pulse width ns ns ns timer a input (external trigger input in one-shot pulse mode) 8 5 10 9 2 f(f 2 ) limits min. max. symbol parameter unit t c(ta) tai in input cycle time ns timer b input (in pulse period measurement mode or pulse width measurement mode) limits min. max. symbol parameter unit ns ns ns t c(tb) tbi in input cycle time t w(tbh) tbi in input high-level pulse width t w(tbl) tbi in input low-level pulse width 8 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) note. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 9 in data sheet m37733mhbxxxfp.
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 17 switching characteristics (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85c, f(x in ) = 12 mhz, unless otherwise noted (note)) limits min. max. t d(eCp0q) port p0 data output delay time 300 ns t d(eCp1q) port p1 data output delay time 300 ns t d(eCp2q) port p2 data output delay time 300 ns t d(eCp3q) port p3 data output delay time 300 ns t d(eCp4q) port p4 data output delay time 300 ns t d(eCp5q) port p5 data output delay time 300 ns t d(eCp6q) port p6 data output delay time 300 ns t d(eCp7q) port p7 data output delay time 300 ns t d(eCp8q) port p8 data output delay time 300 ns unit symbol parameter test conditions fig. 7 note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. single-chip mode fig. 7 measuring circuit for ports p0 C p8 and f 1 50 pf p 0 p 1 p 2 p 3 p 4 p 5 p 6 p 7 p 8 f 1 e
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 18 preliminary notice: this is not a final specification. some paramentic limits are suject to change. symbol parameter t d(eCdq) t h(eCdq) address output delay time address output delay time address hold time ale pulse width address output set up time address hold time ale output delay time memory expansion mode and microprocessor mode (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85c, f(x in ) = 12 mhz (note 1), unless otherwise noted) limits wait mode min. max. test conditions unit 90 10 20 182 20 162 40 40 123 10 93 9 40 4 40 40 131 298 53 20 182 20 182 33 33 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns t d(anCe) t d(aCe) t d(aleCe) t h(eCan) t w(ale) t su(aCale) t h(aleCa) t w(el) data output delay time data hold time _ _ _ _ e pulse width floating start delay time floating release delay time _ _ _ _ _ _ bhe output delay time _ _ _ _ r/ w output delay time _ _ _ _ _ _ _ bhe hold time _ _ r/ w hold time no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 fig. 7 (note 2) 1 output delay time t pxz(eCdz) t pzx(eCdz) t d(bheCe) t d(r/wCe) t h(eCbhe) t h(eCr/w) t d(eC f 1 ) t d( f 1 Chlda) ______ hlda output delay time 030 120 notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. 2. no wait : wait bit = 1. wait 1 : the external memory area is accessed with wait bit = 0 and wait selection bit = 1. wait 0 : the external memory area is accessed with wait bit = 0 and wait selection bit = 0. f
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 19 address output delay time address output delay time address hold time ale pulse width address output set up time address hold time ale output delay time data output delay time data hold time _ _ _ e pulse width floating start delay time floating release delay time no wait wait 1 wait 0 bus timing data formulas (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to + 85 c, f(x in ) = 12 mhz (max., note 1), unless otherwise noted) 90 10 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) ns ns ns ns ns ns ns ns ns ns no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 1 5 10 9 2 f(f 2 ) ns ns ns ns ns ns 9 4 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) ns ns 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) C 63 C 68 C 63 C 88 C 43 C 43 C 43 C 73 C 73 C 43 C 43 C 43 C 35 C 35 C 30 C 63 C 68 C 63 C 68 C 50 C 50 unit symbol parameter limits wait mode min. max. t d(anCe) t d(aCe) t h(eCan) t w(ale) t su(aCale) t h(aleCa) t d(aleCe) t d(eCdq) t h(eCdq) t w(el) t pxz(eCdz) t pzx(eCdz) no wait wait 1 wait 0 _____ bhe output delay time _ _ r/ w output delay time t d(bheCe) t d(r/wCe) t h(eCbhe) t h(eCr/w) t d(eC f 1) f 1 output delay time _ _ r/ w hold time _____ bhe hold time 0 30 ns ns ns ns ns ns ns ns notes 1. this applies when the main-clock division selection bit = 0. 2. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 9 in data sheet m37733mhbxxxfp.
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 20 preliminary notice: this is not a final specification. some paramentic limits are suject to change. t w(h) t d(e?0q) t d(e?2q) t d(e?3q) t d(e?4q) t d(e?5q) t d(e?6q) t d(e?7q) t d(e?8q) port p0 output port p0 input port p1 output port p1 input port p2 output port p2 input port p3 output port p3 input e x in port p4 output port p4 input port p5 output port p5 input port p6 output port p6 input port p7 output port p7 input port p8 output port p8 input t su(p0d?) t h(e?0d) t d(e?1q) t r t f t w(l) t c t su(p1d?) t h(e?1d) t su(p2d?) t h(e?2d) t su(p3d?) t h(e?3d) t su(p4d?) t h(e?4d) t su(p5d?) t h(e?5d) t su(p6d?) t h(e?6d) t su(p7d?) t h(e?7d) t su(p8d?) t h(e?8d) timing diagram
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 21 tai in input tai out input t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t h(t in ?p) t su(up? in ) tai out input (up-down input) tai in input (when count by falling) tai in input (when count by rising) in event count mode taj in input taj out input t c(ta) t su(taj in ?aj out ) t su(taj in ?aj out ) t su(taj out ?aj in ) t su(taj out ?aj in ) in event counter mode (when two-phase pulse input is selected) t c(tb) t w(tbh) t w(tbl) tbi in input
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 22 preliminary notice: this is not a final specification. some paramentic limits are suject to change. t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(knl) t d(c?) t su(d?) t h(c?) t w(inh) ad trg input clk i txd i rxd i inti input kli input t h(c?)
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 23 memory expansion mode and microprocessor mode (when wait bit = ?? ( when wait bit = ?? (when wait bit = ??or ??in common) test conditions ?v cc = 2.7 ?5.5 v ?input timing voltage : v il = 0.2 v cc , v ih = 0.8 v cc ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v f 1 rdy input f 1 e rdy input f 1 hold input hlda output t su(rdy f 1 ) t h( f 1 ?dy) t su(rdy f 1 ) t h( f 1 ?dy) t su(hold f 1 ) t d( f 1 ?lda) t h( f 1 ?old) t d( f 1 ?lda) e
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 24 preliminary notice: this is not a final specification. some paramentic limits are suject to change. f 1 t d(e- f 1) t d(an-e) t w(ale) t d(ale-e) t su(a-ale) t d(a-e) t d(e-dq) t h(ale-a) t d(bhe-e) t h(e-bhe) t d(r/w-e) t h(e-r/w) t h(e-dq) t pxz(e-dz) t su(d-e) t h(e-d) t pzx(e-dz) t h(e-an) t d(e- f 1) t w(el) t w(h) e an ale am/dm dm in bhe r/ w address address address data data address address address t f t r t c t w(l) memory expansion mode and microprocessor mode (no wait : when wait bit = ?? test conditions v cc = 2.7 ?5.5 v output timing voltage : v ol = 0.8 v, v oh = 2.0 v data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc x in
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 25 t w(ale) t c address t w(l) t w(h) t f t r memory expansion mode and microprocessor mode (wait 1 : the external area is accessed when wait bit = ??and wait selection bit = ??) address address t d(e f 1 ) t d(an?) t d(ale?) t su(aale) t h(ale?) t d(a?) t d(e?q) t h(e?) t pzx(e?z) t h(e?he) t su(de) test conditions ?vcc = 2.7 ?5.5 v ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v ?data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc data address data t d(e f 1 ) address t pxz(e?z) t w(el) t h(e?n) t h(e?q) t h(e?/w) t d(r/w?) t d(bhe?) x in e an ale am/dm dm in bhe r /w f 1
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers 26 preliminary notice: this is not a final specification. some paramentic limits are suject to change. t h(ale?) t d(ale?) t d(e?q) t w(l) t w(h) t f t c t r memory expansion mode and microprocessor mode (wait 0 : the external memory area is accessed when wait bit = ??and wait selection bit = ??) x in f 1 address address address address data an ale am/dm dm in r /w t d(an?) t w(ale) t su(a?le) t h(e?q) t d(a?) t pxz(e?z) t pzx(e?z) t h(e?) t su(d?) address data address test conditions ?vcc = 2.7 ?5.5 v ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v ?data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc t d(e f 1 ) t d(e f 1 ) t d(r/w?) t h(e?/w) t w(el) t h(e?n) t d(bhe?) t h(e?he) e bhe
M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change. 27 package outline
single-chip 16-bit microcomputer M37733M4LXXXHP mitsubishi electric date: receipt gzzCsh00C55b<73a0> ( ) note : please fill in all items marked customer supervisor company name date issued date: tel 1. confirmation specify the name of the product being ordered. three sets of eproms are required for each pattern (check @ in the appropriate box). if at least two of the three sets of eproms submitted contai n the identical data, we will produce masks based on this da ta. we shall assume the responsibility for errors only if the ma sk rom data on the products we produce differ from this data . thus, the customer must be especially careful in verifying t he data contained in the eproms submitted. checksum code for entire eprom areas eprom type : (1) set ff 16 in the shaded area. ( 2 ) address 0 16 to 10 16 are the area for storing the data on model designation and options. this area must be written with the data shown below. details for option data are given next in the section describing the stp instruction option. address and data are written in hexadecimal notation. 0 3 7 5 2 f a e c b (hexadecimal notation) 27512 ffff 9 8 d 4 1 6 responsible officer section head signature supervisor signature issuance signatures 4d 33 37 37 33 4d 33 4c ff ff ff ff ff ff ff option data address address address 34 10 one of the following sets of data should be written to the o ption data address (10 16 ) of the eprom you have ordered. check @ in the appropriate box. stp instruction enable stp instruction disable 2. stp instruction option 01 16 00 16 address 10 16 address 10 16 3. mark specification mark specification must be submitted using the correct form for the type of package being ordered fill out the appropria te 80p6d mark specification form (for M37733M4LXXXHP) and attac h to the mask rom order confirmation form. 4. comments 7700 family mask rom order confirmation form mask rom number 0010 0000 8000 32k data
customer ? s parts number note : the fonts and size of characters are standard mitsubishi typ e. mitsubishi ic catalog name notes 1 : the mark field should be written right aligned. 2 : the fonts and size of characters are standard mitsubishi type. 3 : customer ? s parts number can be up to 10 alphanu- meric characters for capital letters, hyphens, commas, periods and so on. 4 : if the mitsubishi logo is not required, check the box below . mitsubishi logo is not required 5 : the allocation of mitsubishi ic catalog name and mitsubishi product number is dif ferent on the package owing to the number of mitsubishi ic catalog name? s characters, and the requiring mitsubishi logo or not. 80p6s (80-pin qfp) mark specifica tion form 80p6d, 80p6q (80-pin fine-pitch qfp) mitsubishi ic catalog name please choose one of the marking types below (a, b, c), and enter the mitsubishi ic catalog name and the special mark (i f neede d). a. standard mitsubishi mark c. special mark required b. customer s parts number + mitsubishi ic catalog name mitsubishi ic catalog name mitsubishi ic catalog name notes 1 : i f special mark is to be printed, indicate the desired layout of the mark in the left figure. the layout will be duplicated technically as close as possible. mitsubishi product number (6-digit, or 7-digit) and mask rom number (3-digit) are always marked for sorting the products. 2 : if special character fonts (e.g., customer s trade mark logo) must be used in special mark, check the box be- low . for the new special character fonts, a clean font origi- nal (ideally logo drawing) must be submitted. special character fonts required 1 80 61 40 60 41 21 20 mitsubishi product number (6-digit, or 7-digit) 1 80 61 40 60 41 21 20 1 80 61 40 60 41 21 20
? 1996 mitsubishi electric corp. h-lf461-a ki-9612 printed in japan (rod) 2 new publication, effective dec. 1996. specifications subject to change without notice. notes regarding these materials these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customers application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-partys rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these materials. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for further details on these materials or the products contained therein. keep safety first in your circuit designs! mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. M37733M4LXXXHP single-chip 16-bit cmos microcomputer mitsubishi microcomputers preliminary notice: this is not a final specification. some paramentic limits are suject to change.
rev. rev. no. date 1.0 first edition 970604 1.01 the following are added: 980526 mask rom order confirmation form mark specification form revision description list M37733M4LXXXHP data sheet (1/1) revision description

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